Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

LA5754MP Scheda tecnica(PDF) 4 Page - Sanyo Semicon Device

Il numero della parte LA5754MP
Spiegazioni elettronici  Monolithic Linear IC Separately-excited Step-down Switching Regulator (Variable Type)
PDF  5 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  SANYO [Sanyo Semicon Device]
Homepage  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LA5754MP Scheda tecnica(HTML) 4 Page - Sanyo Semicon Device

  LA5754MP Datasheet HTML 1Page - Sanyo Semicon Device LA5754MP Datasheet HTML 2Page - Sanyo Semicon Device LA5754MP Datasheet HTML 3Page - Sanyo Semicon Device LA5754MP Datasheet HTML 4Page - Sanyo Semicon Device LA5754MP Datasheet HTML 5Page - Sanyo Semicon Device  
Zoom Inzoom in Zoom Outzoom out
 4 / 5 page
background image
LA5754MP
No.A0952-4/5
Td =
=
= 28.2 msec
C
× V
i
1
µ × 0.62
22
µ
Tss =
=
C
× ∆VPWM × PWMduty
i
C
× 0.88 × PWMduty
22
µA
1.5V
0.62V
PWM wave
PWMduty =
= 25%
VOUT + VF
VIN - Vsat + VF
Tss =
= 10msec
1
µ × 0.88V × 0.25
22
µA
Description of Functional Settings
1.Start delay function
The SS pin has the internally-connected 22
µA (typ) constant-current supply. When the voltage of SS pin exceeds the
threshold voltage, the regulator starts operation. As the threshold is 0.62V(typ), the start delay time can be calculated
as follows:
ex. For setting at 1
µF
2.Soft start function
The internal PWM waveform has the voltage value as shown in the right.
If down-conversion from the voltage of VIN = 15V to 3.3V output to be made,
for example, the PWM-ON duty has the value as shown below.
(Note that calculation is made with Vsat = 1V and VF = 0.2V)
The output voltage of error amplifier, which is 3.3V, is the value with PWM = 25%, as calculated in the above
equation, so that this voltage is determined as follows:
Ver = (
∆VPWM) × PWMduty + VPWML = 0.88V × 0.25 + 0.62V = 0.84V
(
∆VPWM is the PWM amplitude value or 0.88V(typ) while VPWML is the lower limit voltage of PWM
waveform or 0.62V(typ))
SS pin and error amplifier output voltages are designed to prefer the lower voltages, so that VOUT will reach the
designed regulation voltage in timing when the SS pin voltage exceeds the error amplifier output. Therefore, the soft
strt time is calculated as follows:
For the set conditions of C = 1
µF and PWMduty = 25%:



Html Pages

1 2 3 4 5


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com