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M38042FFHKP Scheda tecnica(PDF) 36 Page - Renesas Technology Corp |
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M38042FFHKP Scheda tecnica(HTML) 36 Page - Renesas Technology Corp |
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36 / 387 page ![]() 1-18 REJ09B0212-0100Z Rev.1.00 Jan 14, 2005 3804 Group (Spec.H) HARDWARE FUNCTIONAL DESCRIPTION Fig. 14 Port block diagram (3) (16) Port P53 (15) Port P52 (17) Ports P54, P55 (18) Port P56 PWM output Serial I/O2 synchronous clock selection bit Serial I/O2 port selection bit Data bus Direction register Port latch Pull-up control bit Serial I/O2 external clock input Serial I/O2 clock output SRDY2 enable bit Serial I/O2 ready output Data bus Direction register Port latch Data bus Direction register Port latch Pull-up control bit CNTR interrupt input Pulse output mode Timer output Data bus Direction register Port latch PWM output enable bit Pull-up control bit Pull-up control bit |
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