TSM109D datasheet(4/7 Pages) STMICROELECTRONICS

4 / 7 page

TSM109/A

4/7

COMPARATOR (comparator with inverting input connected to the internal Vref))

VCC+ = +5V, VCC

-= GND, T

amb = +25°C (unless otherwise specified)

Symbol

Parameter

TSM109

Unit

Min.

Typ.

Max.

Vio

Input Offset Voltage - note 1)

Tamb = +25°C

Tmin ≤ Tamb ≤ Tmax

At output switch point, Vo ≈ 1.4V, Rs = 0 with VCC

+ from 5V to 30V, and over the full common-mode range (0V to V

+ -1.5V).

Iib

Input Bias Current for positive input note 2)

Tamb = +25°C

Tmin ≤ Tamb ≤ Tmax

The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the

output, so no loading charge exists on the reference of input lines.

250

400

Avd

Large Signal Voltage Gain

VCC = 15V, RL = 15kΩ, Vo = 1V to 11V

200

V/mV

VOL

Low Level Output Voltage

Vid = -1V, Isink = 4mA

Tamb = +25°C

Tmin ≤ Tamb ≤ Tmax

250

400

700

IOH

High Level Output Current (Vid = 1V)

VCC = Vo = 30V

Tamb = +25°C

Tmin ≤ Tamb ≤ Tmax

150

µA

Isink

Output Sink Currrent

Vid= 1V, Vo = 1.5V

tre

Response Time - note 3)

RL= 5.1kΩ connected to VCC

The response time specified is for a 100mV input step with 5mV overdrive. For larger overdrive signals, 300ns can be obtained.

1.3

µs

trel

Large Signal Response Time

RL= 5.1kΩ connected to VCC

+, e

l = TTL,

V(ref) = +1.4v

300

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