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PCF2123 Scheda tecnica(PDF) 8 Page - NXP Semiconductors |
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PCF2123 Scheda tecnica(HTML) 8 Page - NXP Semiconductors |
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8 / 54 page ![]() PCF2123_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 19 November 2008 8 of 54 NXP Semiconductors PCF2123 SPI Real time clock/calendar 9.1.2 Power consumptions with respect to timer mode Four source clocks are possible for the timer. The 4.096 kHz source clock will add the greatest part to the power consumption. The selection of 64 Hz, 1 Hz or 1 ⁄ 60 Hz will be almost indistinguishable and add very little. Configuration: CLKOUT disabled, quartz RS =15kΩ. (1) IDD (nA) minimum power mode. (2) Timer clock = 4 kHz. (3) Timer clock = 64 Hz, 1 Hz, 1 ⁄ 60 Hz. Fig 7. IDD with respect to timer clock selection VDD (V) 0 6 4 2 001aai559 200 100 300 400 IDD(1) (nA) 0 (2) (3) |
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