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CS4364 Scheda tecnica(PDF) 31 Page - Cirrus Logic |
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CS4364 Scheda tecnica(HTML) 31 Page - Cirrus Logic |
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31 / 50 page ![]() DS619F1 31 CS4364 6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de- sired, bring CS high. 4.15 Memory Address Pointer (MAP) 4.15.1 INCR (Auto Map Increment Enable) Default = ‘0’ 0 - Disabled 1 - Enabled 4.15.2 MAP4-0 (Memory Address Pointer) Default = ‘00000’ 76543210 INCR Reserved Reserved MAP4 MAP3 MAP2 MAP1 MAP0 00000000 MA P MS B LSB DATA byte 1 byte n R/W M A P = M e m o ry A d dress P oin te r ADDRESS CH IP CD IN CCL K CS 0011000 Figure 23. Control Port Timing, SPI Mode |
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