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XIO2000AI Scheda tecnica(PDF) 35 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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XIO2000AI Scheda tecnica(HTML) 35 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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35 / 159 page ![]() Feature/Protocol Descriptions 25 April 2007 Revised October 2008 SCPS155C See the power-up sequencing diagram in Figure 3−2. VDD_15 and VDDA_15 VDD_33 and VDDA_33 VCCP REFCLK PERST 100 ms 100 µs Figure 3−2. Power-Up Sequence 3.1.2 Power-Down Sequence 1. Assert PERST to the device. 2. Remove the reference clock. 3. Remove VCCP clamp voltage. 4. Remove 3.3-V and 1.5-V voltages. Please see the power-down sequencing diagram in Figure 3−3. If the VDD_33_AUX terminal is to remain powered after a system shutdown, then the bridge power-down sequence is exactly the same as shown in Figure 3−3. |
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