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LTC1049CS8 Scheda tecnica(PDF) 6 Page - Linear Technology |
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LTC1049CS8 Scheda tecnica(HTML) 6 Page - Linear Technology |
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6 / 12 page ![]() LTC1049 6 1049fb ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE Picoamperes In order to realize the picoampere level of accuracy of the LTC1049, proper care must be exercised. Leakage currents in circuitry external to the amplifier can signifi- cantly degrade performance. High quality insulation should be used (e.g., Teflon™, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be necessary—particularly for high temperature perfor- mance. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential close to that of the inputs: in inverting configurations, the guard ring should be tied to ground; in noninverting connec- tions, to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Microvolts Thermocouple effects must be considered if the LTC1049’s ultralow drift is to be fully utilized. Any connection of dissimilar metals forms a thermoelectric junction produc- ing an electric potential which varies with temperature (Seebeck effect). As temperature sensors, thermocouples exploit this phenomenon to produce useful information. In low drift amplifier circuits the effect is a primary source of error. Connectors, switches, relay contacts, sockets, resistors, solder, and even copper wire are all candidates for thermal EMF generation. Junctions of copper wire from different manufacturers can generate thermal EMFs of 200nV/ °C— twice the maximum drift specification of the LTC1049. The copper/kovar junction, formed when wire or printed circuit traces contact a package lead, has a thermal EMF of approximately 35 µV/°C—300 times the maximum drift specification of the LTC1049. Minimizing thermal EMF-induced errors is possible if judicious attention is given to circuit board layout and component selection. It is good practice to minimize the number of junctions in the amplifier’s input signal path. Avoid connectors, sockets, switches, and relays where possible. In instances where this is not possible, attempt to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve deliberately introducing junctions to offset unavoidable junctions. PACKAGE-INDUCED OFFSET VOLTAGE Package-induced thermal EMF effects are another impor- tant source of errors. It arises at the copper/kovar junctions formed when wire or printed circuit traces contact a package lead. Like all the previously mentioned thermal EMF effects, it is outside the LTC1049’s offset nulling loop and cannot be cancelled. The input offset voltage specification of the LTC1049 is actually set by the package-induced warm-up drift rather than by the circuit itself. The thermal time constant ranges from 0.5 to 3 minutes, depending on package type. LOW SUPPLY OPERATION The minimum supply for proper operation of the LTC1049 is typically below 4.0V ( ±2.0V). In single supply applica- tions, PSRR is guaranteed down to 4.7V ( ±2.35V) to ensure proper operation down to the minimum TTL specified voltage of 4.75V. PIN COMPATIBILITY The LTC1049 is pin compatible with the 8-pin versions of 7650, 7652 and other chopper-stabilized amplifiers. The 7650 and 7652 require the use of two external capacitors connected to Pins 1 and 8 which are not needed for the LTC1049. Pins 1, 5, and 8 of the LTC1049 are not con- nected internally; thus, the LTC1049 can be a direct plug- in for the 7650 and 7652, even if the two capacitors are left on the circuit board. APPLICATIO S I FOR ATIO |
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