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PROASIC3E Scheda tecnica(PDF) 22 Page - Actel Corporation |
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PROASIC3E Scheda tecnica(HTML) 22 Page - Actel Corporation |
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22 / 37 page ![]() I/O Structures in IGLOOe and ProASIC3E Devices 22 v1.4 Solution 3 The board-level design must ensure that the reflected waveform at the pad does not exceed the voltage overshoot/undershoot limits provided in the datasheet. This is a requirement to ensure long-term reliability. This scheme will also work for a 3.3 V PCI/PCI-X configuration, but the internal diode should not be used for clamping, and the voltage must be limited by the bus switch, as shown in Figure 12. Relying on the diode clamping would create an excessive pad DC voltage of 3.3 V + 0.7 V = 4 V. Figure 12 • Solution 3 Solution 3 Requires a bus switch on the board, LVTTL/LVCMOS 3.3 V I/Os. I/O Input 3.3 V 5.5 V 5.5 V Bus Switch IDTQS32X23 |
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