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LTC1654IGN Scheda tecnica(PDF) 12 Page - Linear Technology |
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LTC1654IGN Scheda tecnica(HTML) 12 Page - Linear Technology |
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12 / 16 page ![]() 12 LTC1654 1654fb Figure 3. Effect of Negative Offset Least Significant Bit (LSB): One LSB is the ideal voltage difference between two successive codes. LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/16383 Nominal LSBs: LTC1654 LSB = 4.09575V/16383 = 250 µV Zero-Scale Error (ZSE): The output voltage when the DAC is loaded with all zeros. Since this is a single supply part, this value cannot be less than 0V. Integral Nonlinearity (INL): End-point INL is the maxi- mum deviation from a straight line passing through the end points of the DAC transfer curve. Because the part operates from a single supply and the output cannot go below zero, the linearity is measured between low code kL and full scale. The INL error at a given input code is calculated as follows: INL = [VOUT – VOS – (VFS – VOS)(code/16383)]/LSB VOUT = The output voltage of the DAC measured at the given input code Differential Nonlinearity (DNL): DNL is the difference between the measured change and the ideal one LSB change between any two adjacent codes. The DNL error between any two codes is calculated as follows: DNL = ( ∆VOUT – LSB)/LSB ∆VOUT = The measured voltage difference between two adjacent codes Digital Feedthrough: The glitch that appears at the analog output caused by AC coupling from the digital inputs when they change state. The area of the glitch is specified in nV • s. Resolution (n): Resolution is defined as the number of digital input bits (n). It is also the number of DAC output states (2n) that divide the full-scale range. Resolution does not imply linearity. Full-Scale Voltage (VFS): This is the output of the DAC when all bits are set to 1. Voltage Offset Error (VOS): Normally, DAC offset is the voltage at the output when the DAC is loaded with all zeros. The DAC can have a true negative offset, but because the part is operated from a single supply, the output cannot go below 0V. If the offset is negative, the output will remain near 0V resulting in the transfer curve shown in Figure 3. Therefore, the offset of the part is measured at low code kL: V Vk kV k OS OUT L L FS n L n = ⎛ ⎝⎜ ⎞ ⎠⎟ () – ()( ) – – – 21 1 21 DAC CODE 1654 F01 OUTPUT VOLTAGE NEGATIVE OFFSET 0V DEFI ITIO S |
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