KH104AI datasheet(4/6 Pages) CADEKA

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DATA SHEET

KH104

REV. 1A January 2004

PC Board Layout Considerations

Proper layout of printed circuit boards is important to

achieve optimum performance of a circuit operating in

the 1GHz frequency range. Use of microstripline is

recommended for all signal-carrying paths and low

resistance, low inductance signal return and bypass

paths should be used. To keep the impedance of

these paths low, use as much ground plane as possible.

Ground plane also serves to increase the flow of heat out

of the package.

The KH104 has three types of connections: signal paths

(input and output), DC inputs (supplies and offset adjust),

and grounds.

Ω microstrip is recommended for

connection to the input (pin 4) and output (pin 11).

Microstrip on a doublesided PC board consists of a

ground plane on one side of the board and a constant-

width signal-carrying trace on the other side of the board.

For 1/16” G10 or FR-4 PC board material, a 0.1” wide

trace will have a 50

Ω characteristic impedance. The

ground plane beneath the signal trace must extend at

least one trace width on either side of the trace. Also, all

traces (including ground) should be kept at least one

trace width from the signal carrying traces.

To keep power supply noise and oscillations from

appearing at the amplifier output, all supply pins should

be capacitively bypassed to ground.

The power

supply pins (1 and 2) are the inputs to a pair of voltage

regulators whose outputs are at pins 13 and 14. It is

recommended that 0.01

µF or larger ceramic capacitors

be connected from pins 1, 2, 13 and 14 to ground, within

0.2” of the pins. A 1

µF or larger solid tantalum capacitor

to ground is required within 3” of pins 1 and 2, and

for good low frequency performance, solid tantalum

capacitors of at least 15

µF should be connected from

pins 13 and 14 to ground within 3” of the pins.

Use

0.025” or wider traces for the supply lines. The offset

adjust pin (12) also requires bypassing; a 0.01

µF or

larger ceramic capacitor to ground within 0.2” of the pin

is recommended.

Grounding is the final layout consideration. Pins 3 and 5-

10 should all be connected to a ground plane which

should cover as much of one side of the board around

the amplifier as possible.

Reducing DC Offset

DC offset of the KH104 may be adjusted by applying a

DC voltage to the amplifier’s offset adjust pin (12). The

simplest method is shown in Figure 1. Using this method

of offset adjust it is possible to vary the output offset by

approximately ±400mV. This simple adjustment has no

effect on the offset drift characteristics of the KH104.

Figure 1: Basic Circuit

If lower offset and offset drift are required, a low frequency

op amp may be used in conjunction with the KH104 in a

composite configuration. The suggested circuit appears

in Figure 2. Its method of operation is to compare an

attenuated version of the output signal to the input signal

and apply a correcting voltage at the offset adjust pin. A

compensation capacitor Cs reduces the bandwidth of the

op amp correction circuit to limit the op amp’s effect on

the KH104 to frequencies below f45, the frequency at

which the op amp has 45dB of open loop gain. Using an

LM108, f45 is about 7Hz with Cs = 0.1µF. Thus the op

amp can correct DC and low frequency errors below f45,

without affecting KH104 performance above f45. Also

note that the noise performance of the op amp will dom-

inate below f45.

Figure 2: Composite Amplifier

With an LM108 op amp in this composite configuration,

input offset is typically 2mV and drift is 15mV/°C.

frequencies well below f45, the composite gain is equal

to (1 + 49.9k/(Ra + Rb)) and the output impedance is

0.01

2.2

0.01

-15V

+15V

0.01

Vin

3,5-10

KH104

Capacitance if

µF

0.01

Offset

Adjust

10K

-15V

+15V

Vin

KH104

LM108

0.01

-15V

+15V

0.01

9.76k

49.9k

11.8k

Ω

Capacitance in

µF

Rc = (Ra + Rb ) || 49.9k

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