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SN75LP1185DB Scheda tecnica(PDF) 7 Page - Texas Instruments |
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SN75LP1185DB Scheda tecnica(HTML) 7 Page - Texas Instruments |
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7 / 8 page ![]() SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335 – JANUARY 1999 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION IO II CL VI VO Inputs Outputs tPLH tPHL tTLH tTHL 4 V 0 V VOH VOL VI VO 50% 50% 50% 50% 90% 90% 10% 10% tw NOTES: A. The pulse generator has the following characteristics: tw = 4 µs, PRR = 250 kbit/s, ZO = 50 Ω, tr and tf < 50 ns. B. CL includes probe and jig capacitance. Figure 4. Receiver Parameter Test Circuit and Waveform IO II VI VO Inputs Outputs VCC GND Figure 5. Receiver IOS Test APPLICATION INFORMATION Diodes placed in series with the VDD and VSS leads protect the SN75LP1185 in the fault condition when the device outputs are shorted to ±15 V and the power supplies are at low voltage and provide low-impedance paths to ground (see Figure 6). SN75LP1185 Output SN75LP1185 Output VDD VSS Figure 6. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F |
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