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THS10064 Scheda tecnica(PDF) 13 Page - Texas Instruments |
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THS10064 Scheda tecnica(HTML) 13 Page - Texas Instruments |
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13 / 41 page ![]() THS10064 10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER SLAS255 – DECEMBER 1999 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 digital output data format The digital output data format of the THS10064 can either be in binary format or in two’s complement format. The following tables list the digital outputs for the analog input voltages. Table 3. Binary Output Format for Single-Ended Configuration SINGLE-ENDED, BINARY OUTPUT ANALOG INPUT VOLTAGE DIGITAL OUTPUT CODE AIN = VREFP 3FFh AIN = (VREFP + VREFM)/2 200h AIN = VREFM 000h Table 4. Two’s Complement Output Format for Single-Ended Configuration SINGLE-ENDED, TWOS COMPLEMENT ANALOG INPUT VOLTAGE DIGITAL OUTPUT CODE AIN = VREFP 1FFh AIN = (VREFP + VREFM)/2 000h AIN = VREFM 200h Table 5. Binary Output Format for Differential Configuration DIFFERENTIAL, BINARY OUTPUT ANALOG INPUT VOLTAGE DIGITAL OUTPUT CODE Vin = AINP – AINM VREF = VREFP – VREFM Vin = VREF 3FFh Vin = 0 200h Vin = –VREF 000h Table 6. Two’s Complement Output Format for Differential Configuration DIFFERENTIAL, BINARY OUTPUT ANALOG INPUT VOLTAGE DIGITAL OUTPUT CODE Vin = AINP – AINM VREF = VREFP – VREFM Vin = VREF 1FFh Vin = 0 000h Vin = –VREF 200h |
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