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TMS320VC33 Scheda tecnica(PDF) 37 Page - Texas Instruments |
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TMS320VC33 Scheda tecnica(HTML) 37 Page - Texas Instruments |
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37 / 57 page ![]() TMS320VC33 DIGITAL SIGNAL PROCESSOR SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004 37 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 loading when XF is configured as an output The following table defines the timing parameter for loading the XF register when the XFx pin is configured as an output. switching characteristics over recommended operating conditions for loading the XF register when configured as an output pin (see Figure 25) PARAMETER VC33-120 VC33-150 UNIT PARAMETER MIN MAX MIN MAX UNIT tv(H3H-XF) Valid time, XFx after H3 high 4 3 ns Fetch Load Decode Read Execute H3 H1 OUTXFx Bit (see Note A) XFx 1 or 0 Instruction tv(H3H-XF) NOTE A: OUTXFx represents either bit 2 or 6 of the IOF register. Figure 25. Timing for Loading XF Register When Configured as an Output Pin |
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