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PCF8534AHL/1 Scheda tecnica(PDF) 35 Page - NXP Semiconductors |
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PCF8534AHL/1 Scheda tecnica(HTML) 35 Page - NXP Semiconductors |
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35 / 47 page ![]() PCF8534A_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 6 August 2009 35 of 47 NXP Semiconductors PCF8534A Universal LCD driver for low multiplex rates The contact resistance between the SYNC pins of cascaded devices must be controlled. If the resistance is too high, the device will not be able to synchronize properly. Table 19 shows the maximum contact resistance values. Fig 23. Synchronization of the cascade for various PCF8534A drive modes Table 19. SYNC contact resistance Number of devices Maximum contact resistance 2 6000 Ω 3 to 5 2200 Ω 6 to 10 1200 Ω 11 to 16 700 Ω Tfr = f fr 1 BP0 SYNC BP0 (1/2 bias) SYNC BP0 (1/3 bias) (a) static drive mode. (b) 1:2 multiplex drive mode. (c) 1:3 multiplex drive mode. (d) 1:4 multiplex drive mode. BP0 (1/3 bias) SYNC SYNC BP0 (1/3 bias) mgl755 |
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