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SPT9101 Scheda tecnica(PDF) 4 Page - Cadeka Microcircuits LLC. |
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SPT9101 Scheda tecnica(HTML) 4 Page - Cadeka Microcircuits LLC. |
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4 / 8 page ![]() 4 12/30/99 SPT9101 Figure 1 - Timing Diagram TIMING SPECIFICATION DEFINITIONS ACQUISITION TIME This is the time it takes the SPT9101 to acquire the analog signal at the internal hold capacitor when it makes a transition from hold mode to track mode. (See figure 1.) The acquisition time is measured from the 50% input clock transition point to the point when the signal is within a specified error band at the internal hold capacitor (ahead of the output amplifier). It does not include the delay and settling time of the output amplifier. Because the signal is internally acquired and settled at the hold capacitor before the output voltage has settled, the sampler can be put in hold mode before the output has settled. TRACK-TO-HOLD SETTLING TIME The time required for the output to settle to within 4 mV of its final value. APERTURE DELAY The aperture delay time is the interval between the leading edge transition of the clock input and the instant when the input signal was equal to the held value. It is the difference in time between the digital hold switch delay and the analog signal propagation time. Because the analog propagation time is longer than the digital delay in the SPT9101, the aperture delay is a negative value. Acquisition Time Aperature Delay Track-to-Hold Settling Hold Track Hold CLK NCLK Output Input Observed at Hold Capacitor Observed at Amplifier Output TEST LEVEL CODES All electrical characteristics are subject to the following conditions: All parameters having min/ max specifications are guaranteed. The Test Level column indicates the specific device test- ing actually performed during production and Quality Assurance inspection. Any blank sec- tion in the data column indicates that the speci- fication is not tested at the specified condition. TEST LEVEL I II III IV V VI TEST PROCEDURE 100% production tested at the specified temperature. 100% production tested at TA=25 °C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at TA = 25 °C. Parameter is guaranteed over specified temperature range. |
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