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STM32F103xC Scheda tecnica(PDF) 52 Page - STMicroelectronics |
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STM32F103xC Scheda tecnica(HTML) 52 Page - STMicroelectronics |
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52 / 123 page ![]() Electrical characteristics STM32F103xC, STM32F103xD, STM32F103xE 52/123 Doc ID 14611 Rev 7 Table 19. Typical current consumption in Sleep mode, coderunning from Flash or RAM Symbol Parameter Conditions fHCLK Typ(1) 1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. Unit All peripherals enabled(2) 2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). All peripherals disabled IDD Supply current in Sleep mode External clock(3) 3. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. 72 MHz 29.5 6.4 mA 48 MHz 20 4.6 36 MHz 15.1 3.6 24 MHz 10.4 2.6 16 MHz 7.2 2 8 MHz 3.9 1.3 4 MHz 2.6 1.2 2 MHz 1.85 1.15 1 MHz 1.5 1.1 500 kHz 1.3 1.05 125 kHz 1.2 1.05 Running on high speed internal RC (HSI), AHB prescaler used to reduce the frequency 64 MHz 25.6 5.1 48 MHz 19.4 4 36 MHz 14.5 3 24 MHz 9.8 2 16 MHz 6.6 1.4 8 MHz 3.3 0.7 4 MHz 2 0.6 2 MHz 1.25 0.55 1 MHz 0.9 0.5 500 kHz 0.7 0.45 125 kHz 0.6 0.45 |
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