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STM32F107VB Scheda tecnica(PDF) 69 Page - STMicroelectronics

Il numero della parte STM32F107VB
Spiegazioni elettronici  Connectivity line, ARM-based 32-bit MCU with 64/256 KB Flash, USB OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication interfaces
PDF  95 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STM32F107VB Scheda tecnica(HTML) 69 Page - STMicroelectronics

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STM32F105xx, STM32F107xx
Electrical characteristics
Doc ID 15274 Rev 4
69/95
Equation 1: RAIN max formula
The formula above (Equation 1) is used to determine the maximum external impedance allowed for an
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
tlat
(2)
Injection trigger conversion latency
fADC = 14 MHz
0.214
µs
3(4)
1/fADC
tlatr
(2)
Regular trigger conversion latency
fADC = 14 MHz
0.143
µs
2(4)
1/fADC
tS
(2)
Sampling time
fADC = 14 MHz
0.107
17.1
µs
1.5
239.5
1/fADC
tSTAB
(2)
Power-up time
0
0
1
µs
tCONV
(2) Total conversion time (including
sampling time)
fADC = 14 MHz
1
18
µs
14 to 252 (tS for sampling +12.5 for
successive approximation)
1/fADC
1. Based on characterization, not tested in production.
2. Guaranteed by design, not tested in production.
3. VREF+ is internally connected to VDDA and VREF- is internally connected to VSSA.
4. For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 51.
Table 51.
ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 52.
RAIN max for fADC = 14 MHz
(1)
1. Based on characterization, not tested in production.
Ts (cycles)
tS (µs)
RAIN max (kY)
1.5
0.11
0.4
7.5
0.54
5.9
13.5
0.96
11.4
28.5
2.04
25.2
41.5
2.96
37.2
55.5
3.96
50
71.5
5.11
NA
239.5
17.1
NA
R
AIN
T
S
f
ADC
C
ADC
2
N2
+
*+
ln
·
·
-------------------------------------------------------------
-
R
ADC
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