MB90F334APMC datasheet(7/72 Pages) FUJITSU

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MB90330A Series

DS07-13734-7E

■ PIN DESCRIPTION

(Continued)

Pin no.

Pin name

I/O

Circuit

type*

Function

108, 107

X0, X1

Terminals to connect the oscillator.

When connecting an external clock, leave the X1 pin side unconnected.

13, 14

X0A, X1A

32 kHz oscillation terminals.

RST

External reset input pin.

93 to 100

P00 to P07

General purpose input/output port.

The ports can be set to be added with a pull-up resistor (RD00 to RD07

= 1)

by the pull-up resistor setting register (RDR0). (When the power output is

set, it is invalid.)

AD00 to AD07

Function as an I/O pin for the low-order external address and data bus in

multiplex mode.

D00 to D07

Function as an output pin for the low-order external data bus in non-

multiplex mode.

101 to 104

P10 to P13

General purpose input/output port.

The ports can be set to be added with a pull-up resistor (RD10 to RD13 = 1)

by the pull-up resistor setting register (RDR1). (When the power output is

set, it is invalid.)

AD08 to AD11

Function as an I/O pin for the high-order external address and data bus in

multiplex mode.

D08 to D11

Function as an output pin for the high-order external data bus in non-

multiplex mode.

109 to 112

P14 to P17

General purpose input/output port.

The ports can be set to be added with a pull-up resistor (RD14 to RD17 = 1)

by the pull-up resistor setting register (RDR1). (When the power output is

set, it is invalid.)

AD12 to D15

Function as an I/O pin for the high-order external address and data bus in

multiplex mode.

D12 to D15

Function as an output pin for the high-order external data bus in non-

multiplex mode.

113 to 116

P20 to P23

This is a general purpose I/O port. When the bits of external address output

control register (HACR) are set to “1” in external bus mode, these pins

function as general purpose I/O ports.

A16 to A19

When the bits of external address output control register (HACR) are set to

“0” in multiplex mode, these pins function as address high output pins.

When the bits of external address output control register (HACR) are set to

“0” in non-multiplex mode, these pins function as address high output pins.

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