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AD7944BCPZ Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD7944BCPZ Scheda tecnica(HTML) 4 Page - Analog Devices |
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4 / 28 page ![]() AD7944 Rev. 0 | Page 4 of 28 Table 3. Parameter Test Conditions/Comments Min Typ Max Unit INTERNAL REFERENCE PDREF is low Output Voltage TA = 25°C 4.081 4.096 4.111 V Temperature Drift −40°C to +85°C ±10 ppm/°C Line Regulation AVDD = 2.5 V ± 5% ±50 ppm/V Turn-On Settling Time CREF = 10 μF, CREFIN = 0.1 μF 40 ms REFIN Output Voltage REFIN at 25°C 1.2 V REFIN Output Resistance 6 kΩ EXTERNAL REFERENCE PDREF is high, REFIN is low Voltage Range 2.4 5.1 V Current Drain 500 μA REFERENCE BUFFER REFIN Input Voltage 1.2 V REFIN Input Current 160 μA DIGITAL INPUTS Logic Levels VIL −0.3 +0.1 × VIO V VIH 0.9 × VIO VIO + 0.3 V IIL −1 +1 μA IIH −1 +1 μA DIGITAL OUTPUTS Data Format Serial 14 bits, straight binary Pipeline Delay Conversion results available immediately after completed conversion VOL ISINK = +500 μA 0.4 V VOH ISOURCE = −500 μA VIO − 0.3 V POWER SUPPLIES AVDD, DVDD 2.375 2.5 2.625 V BVDD 4.75 5.0 5.25 V VIO Specified performance 1.8 2.5 2.7 V Standby Current1, 2 AVDD = DVDD = VIO = 2.5 V 1.0 μA Power Dissipation With Internal Reference 2.5 MSPS throughput 28 33 mW 2.0 MSPS throughput 25 30 mW With External Reference 2.5 MSPS throughput 15.5 17 mW 2.0 MSPS throughput 12 13 mW TEMPERATURE RANGE3 Specified Performance TMIN to TMAX −40 +85 °C 1 With all digital inputs forced to VIO or GND as required. 2 During acquisition phase. 3 Contact an Analog Devices, Inc., sales representative for the extended temperature range. |
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