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MC13821 Scheda tecnica(PDF) 21 Page - Freescale Semiconductor, Inc |
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MC13821 Scheda tecnica(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 42 page ![]() Application Information MC13821 Data Sheet: Technical Data, Rev. 1.5 Freescale Semiconductor 21 Out Ref P1dB High Gain Bypass P1dBout 5.7 — 7.5 — 9.5 — dBm In Ref P1dB High Gain Bypass P1dBin -8 — -7 — -6 — dBm Noise Figure High Gain Bypass NF 1.3 3 1.49 4.3 1.65 6 dB Current Drain High Gain Bypass ICC 3.9 2 4.45 4 5.5 20 mA µA Rbias R1 Value — 1.2 — k Ω Rstability R2 Value — 3.3 — k Ω Rstability R2 Value — 10 — Ω Input Return Loss High Gain Bypass S11 — — -11 -12 -10 -10 dB Gain High Gain Bypass S21 13.7 -4.9 14.5 -4.4 15.5 -3.9 dB Reverse Isolation High Gain Bypass S12 -20 -3.5 -22 -4.4 — — dB Output Return Loss High Gain Bypass S22 — — -14 -14 -10 -10 dB R1 = 2.0 k Ω, R2 = 3.3 kΩ (Refer to Figure 11) Frequency f — 2140 — MHz Power Gain High Gain Bypass G 14.7 -4.2 15.7 -3.2 17.5 -2.2 dB Output Third Order Intercept Point High Gain Bypass OIP3 17.8 18.3 19.2 21.3 21 23.3 dBm Input Third Order Intercept Point High Gain Bypass IIP3 2.5 22.5 3.5 24.5 4.5 25.5 dBm Out Ref P1dB High Gain Bypass P1dBout 8.7 — 10.7 — 12.5 — dBm Table 8. Typical 2140 MHz LNA Demo Board Performance (continued) (Resistor values of R1 and R2 are changed for different ICC and IP3 requirements.) Characteristic Symbol Min Typ Max Unit |
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