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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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ATmega324P Scheda tecnica(PDF) 20 Page - ATMEL Corporation |
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ATmega324P Scheda tecnica(HTML) 20 Page - ATMEL Corporation |
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20 / 377 page  20 7674F–AVR–09/09 ATmega164P/324P/644P The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and the 1024/2048/4096 bytes of internal data SRAM in the ATmega164P/324P/644P are all accessible through all these addressing modes. The Register File is described in “General Purpose Regis- ter File” on page 12. Figure 6-2. Data Memory Map 6.3.1 Data Memory Access Times This section describes the general access timing concepts for internal memory access. The internal data SRAM access is performed in two clk CPU cycles as described in Figure 6-3. Figure 6-3. On-chip Data SRAM Access Cycles 32 Registers 64 I/O Registers Internal SRAM (1024/2048/4096 x 8) $0000 - $001F $0020 - $005F $10FF $0060 - $00FF Data Memory 160 Ext I/O Reg. $0100 clk WR RD Data Data Address Address valid T1 T2 T3 Compute Address CPU Memory Access Instruction Next Instruction |
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