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LT3032IDE Scheda tecnica(PDF) 19 Page - Linear Technology |
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LT3032IDE Scheda tecnica(HTML) 19 Page - Linear Technology |
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19 / 20 page ![]() LT3032 19 3032f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION 3.00 ±0.10 (2 SIDES) 4.00 ±0.10 (2 SIDES) NOTE: 1. DRAWING PROPOSED IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ± 0.10 1.65 ± 0.10 1.65 ± 0.10 BOTTOM VIEW—EXPOSED PAD 0.75 ±0.05 R = 0.115 TYP R = 0.05 TYP 3.00 REF 1 7 14 8 PIN 1 TOP MARK (SEE NOTE 6) 0.200 REF 0.00 – 0.05 (DE14MA) DFN 1106 REV Ø PIN 1 NOTCH R = 0.20 OR 0.25 45° CHAMFER 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 2.10 ±0.05 0.70 ±0.05 DE14MA Package 14-Lead Plastic DFN, Multichip (4mm 3mm) (Reference LTC DWG #05-08-1731 Rev Ø) 3.50 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.25 ± 0.05 0.50 BSC 1.78 ±0.10 0.10 TYP 0.10 TYP 1.07 ±0.10 1.07 ±0.05 0.51 TYP 0.50 BSC 1.78 ±0.05 1.65 ± 0.05 1.65 ± 0.05 0.51 TYP |
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