Production Data

WM8716

WOLFSON MICROELECTRONICS LTD

PD Rev 3.1 April 2001

13

AUDIO DATA INPUT FORMAT

I2S

(REG3, B0)

IW1

(REG2, B4)

IW0

(REG2, B3)

AUDIO INTERFACE

00

0

16-bit standard right justified

00

1

20-bit standard right justified

01

0

24-bit standard right justified

01

1

24-bit left justified (MSB first)

10

0

16-bit I

10

1

24-bit I

11

0

20-bit I

11

1

20-bit left justified (MSB first)

Table 11 Audio Data Input Format

POLARITY OF LR INPUT CLOCK

The left channel data for a particular sample instant is always input first, then the right channel data.

LRP

(REG3, B1)

L

LR High – left channel

LR Low – right channel

H

LR Low – left channel

LR High – right channel

Table 12 Polarity of LR Input Clock

INDIVIDUAL OR COMMON ATTENUTATION CONTROL

ATC

(REG3, B2)

L

Individual control

H

Common control from Reg0

Table 13 Individual or Common Attenuation Control

DIGITAL FILTER ROLL-OFF SELECTION

SRO

(REG3, B3)

L

Sharp

H

Slow

Table 14 Digital Filter Roll-Off Selection

ANALOGUE OUTPUT POLARITY REVERSAL

REV

(REG3, B4)

L

Normal

H

Inverted

Table 15 Analogue Output Polarity Reversal

CLKO OUTPUT FREQUENCY

CKO

(REG3, B5)

L

XTI

H

XTI/2

Table 16 CLKO Output Frequency