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SS6383CSTR Scheda tecnica(PDF) 6 Page - Silicon Standard Corp. |
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SS6383CSTR Scheda tecnica(HTML) 6 Page - Silicon Standard Corp. |
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6 / 7 page ![]() www.SiliconStandard.com 6 of 7 10/07/2004 Rev.1.01 SS6383(G) PIN DESCRIPTIONS PIN 1: VIN - Input supply pin - provides power to create the external reference voltage using a resistor divider for regulating VREF and VOUT. PIN 2: GND - Ground pin. PIN 3: VREF - Reference voltage input. Pull this pin low to shut the device down. PIN 4: VOUT - Output pin. PIN 5~8: VCNTL - Input supply pin - supplies all the internal control circuitry. APPLICATION INFORMATION Layout Consideration The SS6383 is in an SO-8 package and is unable to dissipate heat easily when operating with high currents. In order to avoid exceeding the maximum junction temperature, an appropriate area of copper must be used. The large copper area around the VCNTL pins can be used to assist the heat dissipation. Vias to lead heat into the bottom layer are also recommended. All capacitors should be placed as close to the relative IC pin as possible. Fig. 10. Top layer Fig. 11. Bottom layer Fig. 12. Placement |
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