| Motore di ricerca datesheet componenti elettronici |
|
X24321 Scheda tecnica(PDF) 6 Page - Xicor Inc. |
|
|
|||||||||||||||||||||||||||||
X24321 Scheda tecnica(HTML) 6 Page - Xicor Inc. |
|
6 / 13 page ![]() X24321 6 Figure 5. Page Write Sequence WRITE OPERATIONS Byte Write For a Byte Write Operation, the device requires the Slave Address Byte, the Word Address Byte 1, and the Word Address Byte 0, which gives the master access to any one of the bytes in the array. Upon receipt of the Word Address Byte 0, the device responds with an acknowledge, and waits for the first eight bits of data. After receiving the 8 bits of the data byte, the device again responds with an acknowledge. The master then terminates the transfer by generating a stop condition, at which time the device begins the internal write cycle to the nonvolatile memory. While the internal write cycle is in progress the device inputs are disabled and the device will not respond to any requests from the master. The SDA pin is at high impedance. See figure 4. Page Write Operation The device executes a thirty-two byte Page Write Operation. For a Page Write Operation, the device requires the Slave Address Byte, Address Byte 1, and Address Byte 0. Address Byte 0 must contain the first byte of the page to be written. Upon receipt of Address Byte 0, the device responds with an acknowledge, and waits for the first eight bits of data. After receiving the 8 bits of the first data byte, the device again responds with an acknowledge. The device will respond with an acknowledge after the receipt of each of 31 more bytes. Each time the byte address is internally incre- mented by one, while page address remains constant. When the counter reaches the end of the page, the master terminates the data loading by issuing a stop condition, which causes the device to begin the nonvolatile write cycle. All inputs are disabled until completion of the nonvolatile write cycle. The SDA pin is at high impedance. Refer to figure 5 for the address, acknowledge, and data transfer sequence. S T A R T SLAVE ADDRESS S T O P A C K A C K A C K A C K A C K 7012 ILL F08.1 DATA (1) SIGNALS FROM THE MASTER SDA BUS SIGNALS FROM THE SLAVE DATA (32) ADDRESS BYTE 1 ADDRESS BYTE 0 1 0 1 0 0 S P SIGNALS FROM THE MASTER SDA BUS SIGNALS FROM THE SLAVE S T A R T SLAVE ADDRESS S T O P A C K A C K A C K A C K WORD ADDRESS BYTE 1 DATA 1 0 1 0 0 WORD ADDRESS BYTE 0 S P 7040 FM 07 SIGNALS FROM THE MASTER SDA BUS SIGNALS FROM THE SLAVE S T A R T SLAVE ADDRESS S T O P A C K A C K A C K A C K WORD ADDRESS BYTE 1 DATA 1 0 1 0 0 WORD ADDRESS BYTE 0 S P 7040 FM 07 Figure 4. Byte Write Sequence |
|
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |