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SSM9435K Scheda tecnica(PDF) 4 Page - Silicon Standard Corp. |
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SSM9435K Scheda tecnica(HTML) 4 Page - Silicon Standard Corp. |
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4 / 4 page ![]() Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 4 of 4 SSM9435K Rev.1.01 5/25/2004 td(on) tr td(off)tf VDS VGS 10% 90% Q VG -4.5V QGS QGD QG Charge Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 0.01 0.1 1 10 100 0.1 1 10 100 -V DS , Drain-to-Source Voltage (V) T A =25 o C Single Pulse 1s 1ms 10ms 100ms DC 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 Single Pulse Rthja = 120°C/W Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 0 2 4 6 8 10 12 14 02 46 8 10 12 14 16 18 Q G , Total Gate Charge (nC) I D = -5.3A V DS = -24V 10 100 1000 10000 1 5 9 131721 2529 -V DS , Drain-to-Source Voltage (V) f=1.0MHz Ciss Coss Crss |
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