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74LVC3GU04DP Scheda tecnica(PDF) 7 Page - NXP Semiconductors |
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74LVC3GU04DP Scheda tecnica(HTML) 7 Page - NXP Semiconductors |
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7 / 17 page ![]() 74LVC3GU04_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 11 November 2009 7 of 17 NXP Semiconductors 74LVC3GU04 Triple inverter 12. Waveforms Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. The input (nA) to output (nY) propagation delays mna344 tPHL tPLH VM VM VM VM nA input nY output GND VI VOH VOL Table 9. Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC |
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