S9S08DV96F2CLL datasheet(73/458 Pages) FREESCALE

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Chapter 4 Memory

MC9S08DZ128 Series Data Sheet, Rev. 1

Freescale Semiconductor

NOTE

The FCBEF ﬂag will not set after launching the sector erase abort command.

If an attempt is made to start a new command write sequence with a sector

erase abort operation active, the FACCERR ﬂag in the FSTAT register will

be set. A new command write sequence may be started after clearing the

ACCERR ﬂag, if set.

NOTE

The sector erase abort command should be used sparingly since a sector

erase operation that is aborted counts as a complete program/erase cycle.

4.6.6

Access Errors

An access error occurs whenever the command execution protocol is violated.

Any of the following speciﬁc actions will cause the access error ﬂag (FACCERR) in FSTAT to be set.

FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can be processed.

•

Writing to a FLASH address before the internal FLASH and EEPROM clock frequency has been

set by writing to the FCDIV register.

•

Writing to a FLASH address while FCBEF is not set. (A new command cannot be started until the

command buffer is empty.)

•

Writing a second time to a FLASH address before launching the previous command. (There is only

one write to FLASH for every command.)

•

Writing a second time to FCMD before launching the previous command. (There is only one write

to FCMD for every command.)

•

Writing to any FLASH control register other than FCMD after writing to a FLASH address.

•

Writing any command code other than the six allowed codes (0x05, 0x20, 0x25, 0x40, 0x41, or

0x47) to FCMD.

•

Accessing (read or write) any FLASH control register other than to write to FSTAT (to clear

FCBEF and launch the command) after writing the command to FCMD.

•

The MCU enters stop mode while a program or erase command is in progress. (The command is

aborted.)

•

Writing the byte program, burst program, sector erase or sector erase abort command code (0x20,

0x25, 0x40, or 0x47) with a background debug command while the MCU is secured. (The

background debug controller can do blank check and mass erase commands only when the MCU

is secure.)

•

Writing 0 to FCBEF to cancel a partial command.

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