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BD6761FS Scheda tecnica(PDF) 21 Page - Rohm

Il numero della parte BD6761FS
Spiegazioni elettronici  Three-phase Brushless Motor Pre-drivers for Paper Feed
PDF  23 Pages
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Produttore elettronici  ROHM [Rohm]
Homepage  http://www.rohm.com
Logo ROHM - Rohm

BD6761FS Scheda tecnica(HTML) 21 Page - Rohm

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BD6761FS,BD6762FV
Technical Note
21/22
www.rohm.com
2010.06 - Rev.A
© 2010 ROHM Co., Ltd. All rights reserved.
(12) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of
parasitic elements.
For example, when a resistor and transistor are connected to pins as shown in Fig. 14,
○ the P/N junction functions as a parasitic diode
when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
○ Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines
with the N layer of other adjacent elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result
of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC
malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will
trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (P substrate)
voltage to input pins.
(13) Ground Circuit Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change
the GND wiring pattern of any external parts, either.
Fig. 14 Mimetic Diagram of Parasitic Element
Resistor
Transistor (NPN)
N
N
N
P
+
P
+
P
P substrate
GND
Parasitic element
Pin A
N
N
P
+
P
+
P
P substrate
GND
Parasitic element
Pin B
C
B
E
N
GND
Pin A
Parasitic
element
Pin B
Other adjacent elements
E
B
C
GND
Parasitic
element



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