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DSP56F805 Scheda tecnica(PDF) 39 Page - Freescale Semiconductor, Inc |
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DSP56F805 Scheda tecnica(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 56 page ![]() Serial Peripheral Interface (SPI) Timing 56F805 Technical Data, Rev. 16 Freescale Semiconductor 39 Figure 3-21 SPI Slave Timing (CPHA = 0) Figure 3-22 SPI Slave Timing (CPHA = 1) SCLK (CPOL = 0) (Input) SCLK (CPOL = 1) (Input) MISO (Output) MOSI (Input) Slave MSB out Bits 14–1 MSB in Bits 14–1 LSB in SS (Input) Slave LSB out tDS tCL tCL tDI tDI tCH tCH tR tR tELG tDH tELD tC tF tF tD tA tDV SCLK (CPOL = 0) (Input) SCLK (CPOL = 1) (Input) MISO (Output) MOSI (Input) Slave MSB out Bits 14–1 MSB in Bits 14–1 LSB in SS (Input) Slave LSB out tELG tDI tDS tDH tELD tC tCL tCH tR tF tF tCL tCH tDV tA tDV tR tD |
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