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DLPC200 Scheda tecnica(PDF) 30 Page - Texas Instruments

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Il numero della parte DLPC200
Spiegazioni elettronici  DLP짰 Digital Controller for the DLP5500 DMD
PDF  41 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

DLPC200 Scheda tecnica(HTML) 30 Page - Texas Instruments

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SPI_CLK
SPI_DATA
tp_su
tp_h
tp_wh
tp_wl
tp_clkper
DLPC200
DLPS014A – APRIL 2010 – REVISED MAY 2010
www.ti.com
Figure 11. Flash Memory Interface Timing
Recomended Serial Flash Devices shows the Serial Flash parts that were tested by TI and found to work
properly with the DLPC200.
Recommended Serial Flash Devices
PART NUMBER
MANUFACTURER
SIZE
M25P64
Numonyx
64 Mbit
W25Q64BV
Winbond
64 Mbit
STATIC RAM Interface
The DLPC200 controller Satic RAM (SRAM) interface consists of a high performance CMOS Static RAM
organized as 128K words by 16 bits (2 Mbit).
STATIC RAM INTERFACE TIMING REQUIREMENTS
PARAMETER
MIN
MAX
UNIT
tRC
Read cycle time
10
ns
tAA
Address to data valid
10
ns
tOHA
Data hold from address change
3
ns
tWC
Write cycle time
10
ns
tSCE
CE low to write end
7
ns
tAW
Address setup to write end
7
ns
tHA
Address hold from write end
0
ns
tSA
Address setup to write start
0
tPWE
WE pulse width
7
tSD
Data setup to write end
5
tHD
Data hold from write end
0
30
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): DLPC200



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