B

DIR

5

4

A

3

SN74LVC1T45

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1T45YZPR

_ _ _TA_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC1T45DBVR

SOT (SOT-23) – DBV

CT1_

Reel of 250

SN74LVC1T45DBVT

–40°C to 85°C

Reel of 3000

SN74LVC1T45DCKR

SOT (SC-70) – DCK

Reel of 250

SN74LVC1T45DCKT

TA_

SOT (SOT-533) – DRL

Reel of 4000

SN74LVC1T45DRLR

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(3)

DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

INPUT

OPERATION

DIR

L

B data to A bus

H

A data to B bus

(1)

Input circuits of the data I/Os

always are active.

LOGIC DIAGRAM (POSITIVE LOGIC)

2

Submit Documentation Feedback

Copyright © 2003–2009, Texas Instruments Incorporated

Product Folder Link(s): SN74LVC1T45