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TMP122AMDBVTEP Scheda tecnica(PDF) 7 Page - Texas Instruments |
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TMP122AMDBVTEP Scheda tecnica(HTML) 7 Page - Texas Instruments |
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7 / 17 page ![]() READ ADDRESS REGISTER TMP122-EP www.ti.com .......................................................................................................................................................................................... SBOS454 – NOVEMBER 2008 Figure 5. READ followed by READ Command and Response Figure 6. Data READ Figure 7 shows the internal register structure of the TMP122/TMP124. Table III describes the addresses of the registers available. The READ address register uses the two bits to identify which of the data registers should respond to a read command. Following a complete 16-bit read, the READ address register is reset to the default power-up state of P1/P0 equal 0/0. Figure 7. Internal Register Structure Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TMP122-EP |
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