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TMS320DM647 Scheda tecnica(PDF) 169 Page - Texas Instruments |
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TMS320DM647 Scheda tecnica(HTML) 169 Page - Texas Instruments |
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169 / 181 page  VCLK 4 4 3 1 2 TMS320DM647 TMS320DM648 www.ti.com SPRS372F – JANUARY 2010 – REVISED SEPTEMBER 2009 Table 6-90. VLYNQ Registers (continued) HEX ADDRESS RANGE ACRONYM REGISTER NAME 0x3800 00BC RRAMO4 VLYNQ Remote Receive Address Map Offset 4 0x3800 00C0 RCHIPVER VLYNQ Remote Chip Version Register 0x3800 00C4 RAUTNGO VLYNQ Remote Auto Negotiation Register 0x3800 00C8 RMANNGO VLYNQ Remote Manual Negotiation Register 0x3800 00CC RNGOSTAT VLYNQ Remote Negotiation Status Register 0x3800 00D0 - 0x3800 00DC - Reserved 0x3800 00E0 RINTVEC0 VLYNQ Remote Interrupt Vector 3 - 0 0x3800 00E4 RINTVEC1 VYLNQ Remote Interrupt Vector 7 - 4 0x3800 00E8 - 0x3800 00FC - Reserved for future use [Remote Interrupt Vectors 8 - 31] 6.22.3 VLYNQ Electrical Data/Timing Table 6-91. Timing Requirements for VCLK for VLYNQ (see Figure 6-53) 720, 800, 900, 1100 NO. UNIT MIN MAX 1 tc(VCLK) Cycle time, VCLK 8 ns Pulse duration, VCLK high, VCLK Input 2 ns 2 tw(VCLKH) Pulse duration, VCLK high, VCLK Output 3 ns Pulse duration, VCLK low, VCLK Input 2 ns 3 tw(VCLKL) Pulse duration, VCLK low, VCLK Output 3 ns 4 tt(VCLK) Transition time, VCLK ns Figure 6-53. VCLK Timing for VLYNQ Copyright © 2010–2009, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 169 Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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