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FS8107E Scheda tecnica(PDF) 7 Page - Princeton Technology Corp |
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FS8107E Scheda tecnica(HTML) 7 Page - Princeton Technology Corp |
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7 / 10 page ![]() FS8107E Page 7 April 2003 13-bit R-counter latch and the remaining 3 LSBs are used to control testing modes and should be set as follows for normal operation: R14 = high, R15 = low, R16 = low. To dis- able LD output (i.e. set LD low), R14 should be set low. Serial input data timing waveforms are shown in Fig. 2. Fig. 1 – Serial input data format Fig. 2 – Serial input data timing waveforms 16-bit data for N-counter 13-bit data for R-counter t SU1 t SU2 t HOLD DATA CLK LE DATA CLK LE 2 3456789 10 11 12 13 14 15 16 17 1 |
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