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EP3C80 Scheda tecnica(PDF) 7 Page - Altera Corporation |
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EP3C80 Scheda tecnica(HTML) 7 Page - Altera Corporation |
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7 / 34 page ![]() Chapter 1: Cyclone III Device Data Sheet 1–7 Electrical Characteristics © January 2010 Altera Corporation Cyclone III Device Handbook, Volume 2 Bus Hold Bus hold retains the last valid logic state after the source driving it either enters the high impedance state or is removed. Each I/O pin has an option to enable bus hold in user mode. Bus hold is always disabled in configuration mode. Table 1–5 lists bus hold specifications for Cyclone III devices. OCT Specifications Table 1–6 lists the variation of OCT without calibration across process, temperature, and voltage. OCT calibration is automatically performed at device power-up for OCT enabled I/Os. Table 1–5. Cyclone III Devices Bus Hold Parameter (Note 1) Parameter Condition V CC IO (V) Unit 1.2 1.5 1.8 2.5 3.0 3.3 Min Max Min Max Min Max Min Max Min Max Min Max Bus-hold low, sustaining current V IN > VIL (maximum) 8 — 12 — 30 — 50 — 70 — 70 — μA Bus-hold high, sustaining current V IN < VIL (minimum) –8 — –12 — –30 — –50 — –70 — –70 — μA Bus-hold low, overdrive current 0 V < V IN < VCC IO — 125 — 175 —200 —300 —500 — 500 μA Bus-hold high, overdrive current 0 V < V IN < VCC IO — –125 — –175 — –200 — –300 — –500 — –500 μA Bus-hold trip point — 0.3 0.9 0.375 1.125 0.68 1.07 0.7 1.7 0.8 2 0.8 2 V Note to Table 1–5: (1) The bus-hold trip points are based on calculated input voltages from the JEDEC standard. Table 1–6. Cyclone III Devices Series OCT without Calibration Specifications Description V CCIO (V) Resistance Tolerance Unit Commercial Max Industrial and Automotive Max Series OCT without calibration 3.0 ±30 ±40 % 2.5 ±30 ±40 % 1.8 +40 ±50 % 1.5 +50 ±50 % 1.2 +50 ±50 % |
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