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LP2966EP Scheda tecnica(PDF) 13 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte LP2966EP
Spiegazioni elettronici  Enhanced Plastic Dual 150mA Ultra Low-Dropout Regulator
PDF  15 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP2966EP Scheda tecnica(HTML) 13 Page - National Semiconductor (TI)

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Applications Information (Continued)
ERROR and the output voltage. In this example, the input
voltage is changed to demonstrate the functionality of the
Error Flag.
The internal error flag comparators have open drain output
stages. Hence, the ERROR pins should be pulled high
through a pull up resistor. Although the ERROR pin can sink
current of 1mA, this current adds to the battery drain. Hence,
the value of the pull up resistor should be in the range of
100k
Ω to 1MΩ. The ERROR pins must be connected to
ground if this function is not used. It should also be noted
that when the shutdown pins are pulled low, the ERROR pins
are forced to be invalid for reasons of saving power in
shutdown mode.
SHUTDOWN OPERATION
The two LDO regulators in the LP2966EP have independent
shutdown. A CMOS Logic level signal at the shutdown( SD)
pin will turn-off the corresponding regulator. Pins SD1 and
SD2 must be actively terminated through a 100k
Ω pull-up
resistor for a proper operation. If these pins are driven from
a source that actively pulls high and low (such as a CMOS
rail to rail comparator), the pull-up resistor is not required.
These pins must be tied to Vin if not used.
DROP-OUT VOLTAGE
The drop-out voltage of a regulator is defined as the mini-
mum input-to-output differential required to stay within
100mV of the output voltage measured with a 1V differential.
The LP2966EP uses an internal MOSFET with an Rds(on) of
1
Ω. For CMOS LDOs, the drop-out voltage is the product of
the load current and the Rds(on) of the internal MOSFET.
REVERSE CURRENT PATH
The internal MOSFET in the LP2966EP has an inherent
parasitic diode. During normal operation, the input voltage is
higher than the output voltage and the parasitic diode is
reverse biased. However, if the output is pulled above the
input in an application, then current flows from the output to
the input as the parasitic diode gets forward biased. The
output can be pulled above the input as long as the current
in the parasitic diode is limited to 150mA.
MAXIMUM OUTPUT CURRENT CAPABILITY
Each output in the LP2966EP can deliver a current of more
than 150mA over the full operating temperature range. How-
ever, the maximum output current capability should be der-
ated by the junction temperature. Under all possible condi-
tions, the junction temperature must be within the range
specified under operating conditions. The LP2966EP is
available in MSOP-8 package. This package has a junction
to ambient temperature coefficient (
θ
ja) of 235 ˚C/W with
minimum amount of copper area. The total power dissipation
of the device is approximately given by:
P
D =(Vin -VOUT1)IOUT1 +(Vin-VOUT2)IOUT2
The maximum power dissipation, P
Dmax, that the device can
tolerate can be calculated by using the formula
P
Dmax =(Tjmax -TA)/
θ
ja
where T
jmax is the maximum specified junction temperature
(125˚C), and T
A is the ambient temperature.
The following figures show the variation of thermal coeffi-
cient with different layout scenarios.
20099335
FIGURE 3. Error Flag Operation
www.national.com
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