MB90F482BPMC datasheet(16/124 Pages) FUJITSU

16 / 124 page

MB90480B/485B Series

DS07-13722-11E

■ HANDLING DEVICES

Be careful never to exceed maximum rated voltages (preventing latch-up)

In CMOS IC devices, a condition known as latch-up may occur if voltages higher than VCC or lower than VSS are

applied to input or output pins other than medium-or high-voltage pins, or if the voltage applied between VCC and

VSS pins exceeds the rated voltage level.

When latch-up occurs, the power supply current increases rapidly causing the possibility of thermal damage to

circuit elements. Therefore it is necessary to ensure that maximum ratings are not exceeded in circuit operation.

Similarly, when turning the analog power supply on or off, it is necessary to ensure that the analog power supply

voltages (AVCC and AVRH) and analog input voltages do not exceed the digital power supply (VCC) .

Treatment of unused pins

Leaving unused input pins unconnected can cause abnormal operation or latch-up, leading to permanent

damage. Unused input pins should always be pulled up or down through resistance of at least 2 k

Ω. Any unused

input/output pins may be set to output mode and left open, or set to input mode and treated the same as unused

input pins.

Treatment of Power Supply Pins (VCC/VSS)

When multiple VCC/VSS pins are present, device design considerations for prevention of latch-up and unwanted

electromagnetic interference, abnormal strobe signal operation due to ground level rise, and conformity with

total output current ratings require that all power supply pins must be externally connected to power supply or

ground.

Consideration should be given to connecting power supply sources to the VCC/VSS pins of this device with as low

impedance as possible. It is also recommended that a bypass capacitor of approximately 0.1

μF be placed

between the VCC and VSS lines as close to this device as possible.

Crystal Oscillator Circuits

Noise around the X0/X1, or X0A/X1A pins may cause this device to operate abnormally. In the interest of stable

operation it is strongly recommended that printed circuit board artwork places ground bypass capacitors as close

as possible to the X0/X1, X0A/X1A and crystal oscillator (or ceramic oscillator) and that oscillator lines do not

cross the lines of other circuits.

Precautions when turning the power supply on

In order to prevent abnormal operation in the chip’s internal step-down circuits, a voltage rise time during power-

on of 50

μs (0.2 V to 2.7 V) or greater should be assured.

Supply Voltage Stabilization

Even within the operating range of VCC supply voltage, rapid voltage fluctuations may cause abnormal operation.

As a standard for power supply voltage stability, it is recommended that the peak-to-peak VCC ripple voltage at

commercial supply frequency (50/60 Hz) be 10

% or less of VCC, and that the transient voltage fluctuation be no

more than 0.1 V/ms or less when the power supply is turned on or off.

Proper power-on/off sequence

The A/D converter power (AVCC, AVRH) and analog input (AN0 to AN7) must be turned on after the digital power

supply (VCC) is turned on. The A/D converter power (AVCC, AVRH) and analog input (AN0 to AN7) must be shut

off before the digital power supply (VCC) is shut off. Care should be taken that AVRH does not exceed AVCC. Even

when pins used as analog input pins are doubled as input ports, be sure that the input voltage does not exceed

AVCC.

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