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3000 Scheda tecnica(PDF) 32 Page - Intel Corporation |
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3000 Scheda tecnica(HTML) 32 Page - Intel Corporation |
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32 / 102 page ![]() Electrical Specifications 34 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet Ileak- High impedance leakage to GND N/A 10 µA 3 Cbus Bus capacitance per node N/A 10 pF 4 Vnoise Signal noise immunity above 300 MHz 0.1 * VTT —Vp-p Notes: 1. VTT supplies the PECI interface. PECI behavior does not affect VTT min/max specifications. Refer to Table 2-3 for VTT specifications. 2. The input buffers use a Schmitt-triggered input design for improved noise immunity. 3. The leakage specification applies to powered devices on the PECI bus. 4. One node is counted for each client and one node for the system host. Extended trace lengths might appear as additional nodes. Table 20. PECI DC Electrical Limits Symbol Definition and Conditions Min Max Units Notes1 |
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