M41ST87YMX6F datasheet(26/52 Pages) STMICROELECTRONICS

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Operating modes

M41ST87Y, M41ST87W

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Doc ID 9497 Rev 8

2.7

Tamper detection operation

The tamper pins are triggered based on the state of an external switch. Two switch mode

options are available, normally open or normally closed, based on the setting of the tamper

connect mode bit (TCMX). If the selected switch mode is normally open (TCMX = '1'), the

tamper pin will be triggered by being connected to VSS (if the TPMX bit is set to '0') or to VCC

(if the TPMX bit is set to '1'), through the closing of the external switch. When the external

switch is closed, the tamper bit (TBx) will be immediately set, allowing the user to determine

if the device has been physically tampered with. If the selected switch mode is normally

closed (TCMX = '0'), the tamper pin will be triggered by being pulled to VSS or to VOUT

(depending on the state of the TPMX bit), through an internal pull-up/pull-down resistor as a

result of opening the external switch.

When a tamper event occurs, the tamper bits (TB1 and/or TB2) will be immediately set if

TEBX = '1.'

If the tamper interrupt enable bit (TIEX) is set to a '1,' the IRQ/OUT pin will also be activated.

The IRQ/OUT output is cleared by a READ of the flags register (as seen in Figure 24 on

page 34), a reset of the TIE bit to '0,' or the RST output is asserted.

Note:

In order to avoid an inadvertent activation of the IRQ/OUT pin due to a prior tamper event,

the flag register (0Fh) should be read prior to resetting the TEBX bit.

The tamper bits are “read only” bits and are reset only by writing the tamper enable bit

(TEBX) to '0.' Thus, when servicing a tamper interrupt, the user should read the flags

TEBx to again enable the tamper circuit.

The tamper detect function operates both under normal power, and in battery backup. Even

if the trigger event occurs during a power-down condition, the tamper flag bit(s) will be set

correctly.

2.8

Sampling

As the switch mode normally closed (TCMX = '0') requires a greater amount of current to

maintain constant monitoring, the M41ST87Y/W offers a programmable tamper detect

sampling bit (TDSX) to reduce the current drawn on VCC or VBAT (see Figure 17 on

page 23). When enabled, the sampling frequency is once per second (1Hz), for a duration of

approximately 1 ms.

When TEBX is disabled, no current will be drawn by the tamper detection circuit. After a

tamper event has been detected, no additional current will be drawn.

Note:

The oscillator must be running for tamper detection to operate in the sampling mode. If the

oscillator is stopped, the tamper detection circuit will revert to constant monitoring.

Note:

Sampling in the tamper high mode (TPMX = '1') may be bypassed while on VCC by

connecting the TPxIN pin to VCC through an external resistor. This will allow constant

monitoring when VCC is “on” and revert to sampling when in battery backup (see Figure 14

on page 20).

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