Micrel, Inc.

MIC4782

August 2009

3

M9999-081709-D

Pin Description

Pin Number

Pin Name

Pin Function

1

FB2

Feedback for output 2 (Input). Input to the error amplifier, connect to the external resistor

divider network to set the output voltage.

2

(1)

EN2

Enable for output 2 (Input). Logic level low, will shutdown the device, reducing the current

draw to 1.6µA typical. (both EN1 and EN2 are low).

3,4

SW2

Switch for output 2 (Output): Internal power P-Channel MOSFET output switch

5

PGND2

Power Ground for output 2. Provides the ground return path for the high-side drive current.

PGND1 pin and PGND2 pin are internally connected by anti-parallel diodes.

6,15

VIN2

Supply Voltage for output 2 (Input): Supply voltage for the source of the internal P-channel

MOSFET and driver. Requires bypass capacitor-to-GND.

VIN1 pins and VIN2 pins are internally connected by anti-parallel diodes.

7,14

VIN1

Supply Voltage for output 1 (Input): Supply voltage for the source of the internal P-channel

MOSFET and driver. Requires bypass capacitor-to-GND.

VIN1 pins and VIN2 pins are internally connected by anti-parallel diodes.

8

PGND1

Power Ground for output 1. Provides the ground return path for the high-side drive

current.

PGND1 pin and PGND2 pin are internally connected by anti-parallel diodes.

9,10

SW1

Switch for output 1 (Output): Internal power P-Channel MOSFET output switch

11

(1)

EN1

Enable for output 1 (Input). Logic level low, will shutdown the device, reducing the current

draw to 1.6µA typical. (both EN1 and EN2 are low).

12

FB1

Feedback for output 1 (Input). Input to the error amplifier, connect to the external resistor

divider network to set the output voltage.

13

SGND

Signal (Analog) Ground. Provides return path for control circuitry and internal reference.

16

BIAS

Internal circuit bias supply. Must be bypassed with a 0.1µF ceramic capacitor-to-SGND.

Biased through a 10Ω resistor to VIN.

EPAD

GND

Connect to ground.

Note:

1. Do not float Enable Input.