PPC8567CVTAUGGA datasheet(125/139 Pages) FREESCALE

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MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

125

Thermal

23.5.2

Minimum Platform Frequency Requirements for PCI Express, SRIO,

PCI interfaces Operation

For proper PCI Express operation, the CCB clock frequency must be greater than:

Note that the “PCI Express link width” in the above equation refers to the negotiated link width as the

result of PCI Express link training, which may or may not be the same as the link width POR selection.

For proper Serial RapidIO operation, the CCB clock frequency must be greater than:

For proper PCI operation in synchronous mode, the minimum CCB:SYSCLK ratio is 6:1.

24 Thermal

This section describes the thermal specifications of the MPC8568E.

24.1

Thermal Characteristics

Table 87 provides the package thermal characteristics.

24.2

Thermal Management Information

This section provides thermal management information for the flip chip plastic ball grid array (FC-PBGA)

package for air-cooled applications. Proper thermal control design is primarily dependent on the

Table 87. Package Thermal Characteristics

Characteristic

Symbol

Value

Unit

Notes

Junction-to-ambient Natural Convection on single layer board (1s)

RθJA

°C/W

1, 2

Junction-to-ambient Natural Convection on four layer board (2s2p)

RθJA

°C/W

1, 2

Junction-to-ambient (@200 ft/min or 1 m/s) on single layer board (1s)

RθJA

•C/W

C/W

1, 2

Junction-to-ambient (@200 ft/min or 1 m/s) on four layer board (2s2p)

RθJA

•C/W

C/W

1, 2

Junction-to-board

RθJB

9•C/W

C/W

Junction-to-case

RθJC

<0.1

•C/W

C/W

Notes

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance

2. Per JEDEC JESD51-6 with the board horizontal.

3. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board near the package.

4. Thermal resistance between the active surface of the die and the case top surface determined by the cold plate method (MIL

SPEC-883, Method 1012.1) with the calculated case temperature. Actual thermal resistance is less than 0.1 °C/W.

527 MHz

PCI Express link width

()

----------------------------------------------------------------------------------------------

20.80

()

serial RapidIO interface frequency

()

serial RapidIO link width

()

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