TC1767 datasheet(17/126 Pages) INFINEON

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TC1767

Introduction

Data Sheet

V1.3, 2009-09

2.2

System Architecture of the TC1767

The TC1767 combines three powerful technologies within one silicon die, achieving new

levels of power, speed, and economy for embedded applications:

•

Reduced Instruction Set Computing (RISC) processor architecture

•

Digital Signal Processing (DSP) operations and addressing modes

•

On-chip memories and peripherals

DSP operations and addressing modes provide the computational power necessary to

efficiently analyze complex real-world signals. The RISC load/store architecture

provides high computational bandwidth with low system cost. On-chip memory and

peripherals are designed to support even the most demanding high-bandwidth real-time

embedded control-systems tasks.

Additional high-level features of the TC1767 include:

•

Program Memory Unit – instruction memory and instruction cache

•

Serial communication interfaces – flexible synchronous and asynchronous modes

•

Peripheral Control Processor – standalone data operations and interrupt servicing

•

DMA Controller – DMA operations and interrupt servicing

•

General-purpose timers

•

High-performance on-chip buses

•

On-chip debugging and emulation facilities

•

Flexible interconnections to external components

•

Flexible power-management

TC1767 clock frequencies:

•

Maximum CPU clock frequency: 133 MHz

•

Maximum PCP clock frequency: 133 MHz

•

Maximum SPB frequency: 80 MHz

The TC1767 is a high-performance microcontroller with TriCore CPU, program and data

memories, buses, bus arbitration, an interrupt controller, a peripheral control processor,

a DMA controller and several on-chip peripherals. The TC1767 is designed to meet the

needs of the most demanding embedded control systems applications where the

competing issues of price/performance, real-time responsiveness, computational power,

data bandwidth, and power consumption are key design elements.

The TC1767 offers several versatile on-chip peripheral units such as serial controllers,

timer units, and Analog-to-Digital converters. Within the TC1767, all these peripheral

units are connected to the TriCore CPU/system via the Flexible Peripheral Interconnect

(FPI) Bus and the Local Memory Bus (LMB). Several I/O lines on the TC1767 ports are

reserved for these peripheral units to communicate with the external world.

1) For CPU frequencies > 80 MHz, 2:1 mode has to be enabled. CPU 2:1 mode means: f

SPB = 0.5 * fCPU

2) For PCP frequencies > 80 MHz, 2:1 mode has to be enabled. PCP 2:1 mode means: f

SPB = 0.5 * fPCP

3) CPU 1:1 Mode means: f

SPB = fCPU . PCP 1:1 mode means: fSPB = fPCP

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