MCP65R46 datasheet(23/34 Pages) MICROCHIP

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DS22269A-page 23

MCP65R41/6

4.3.2

INVERTING CIRCUIT

Figure 4-6 shows an inverting circuit for single-supply

using three resistors. The resulting hysteresis diagram

is shown in Figure 4-7.

FIGURE 4-6:

Inverting Circuit with

Hysteresis.

FIGURE 4-7:

Hysteresis Diagram for the

Inverting Circuit.

In order to determine the trip voltages (VTHL and VTLH)

for the circuit shown in Figure 4-6, R2 and R3 can be

simplified to the Thevenin equivalent circuit with

respect to VREF, as shown in Figure 4-8:

FIGURE 4-8:

Thevenin Equivalent Circuit.

By using this simplified circuit, the trip voltage can be

calculated using the following equation:

EQUATION 4-1:

Figures 2-23 and 2-26 can be used to determine the

typical values for VOH and VOL.

4.4

Bypass Capacitors

With this family of comparators, the power supply pin

(VDD for single supply) should have a local bypass

capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good

edge rate performance.

4.5

Capacitive Loads

4.5.1

OUT PIN

Reasonable capacitive loads (e.g., logic gates) have

little impact on the propagation delay (see Figure 2-34).

The supply current increases with the increasing toggle

frequency

(Figure 2-22),

especially

with

higher

capacitive loads. The output slew rate and propagation

delay performance will be reduced with higher capaci-

tive loads.

4.5.2

VREF PIN

The reference output is designed to interface to the

comparator input pins, either directly or with some

resistive network, such as voltage divider network, with

minimal capacitive load. The recommended capacitive

load is 200 pF (typical). Capacitive loads greater than

2000 pF may cause the VREF output to oscillate at

power up.

VIN

VOUT

VDD

VREF

VPU

RPU*

* Pull-up resistor required for the MCP65R46 only.

VOUT

High-to-Low

Low-to-High

VDD

VOH

VOL

VSS

VDD

VTLH VTHL

VIN

V23

VOUT

VDD

R23

VSS

VPU

RPU*

* Pull-up resistor required for the MCP65R46 only.

Where:

2R3

-------------------

-------------------V

REF



THL

-----------------------







----------------------





TLH

-----------------------







----------------------





Where:

VTLH = trip voltage from low to high

VTHL = trip voltage from high to low

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