FX980 datasheet(44/86 Pages) CMLMICRO

44 / 86 page

TETRA Baseband Processor

FX980

D/980/3

RxErrorStatMask

Title:

Receive Error Status interrupt Mask register.

Address:

$0x21

Function:

Description:

Masks interrupts in the RxErrorStatus register.

On taking N_RESET Low, these bits are set

active, so masking out all possible interrupt sources. Each bit which is taken inactive will allow

its associated status bit, when active, to generate an interrupt.

Bit

Name

Active State

Function

n_RxDataPathQOF_Mask

Low

GPO Q channel error interrupt mask bit.

n_RxDataPathIOF_Mask

Low

GPO I channel error interrupt mask bit.

n_AdcQOF_Mask

Low

ADC Q channel error interrupt mask bit.

n_AdcIOF_Mask

Low

ADC I channel error interrupt mask bit.

n_Rx63tapOF_Mask

Low

63-tap I and Q filter error interrupt mask bit.

n_Rx49tapOF_Mask

Low

49-tap I and Q filter error interrupt mask bit.

EvenSamplePhase_Mask

Low

Rx data Q-phase interrupt mask bit.

Data

Reserved for manufacturer’s test purposes. This bit

should be set Low.

• Address and Data format for RxStatMask access

D7 D6 D5 D4 D3 D2

Data field [7:0]

Address field [6:0]

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