LC74786JM datasheet(16/23 Pages) SANYO

16 / 23 page

No. 5729-16/23

LC74786, 74786M, 74786JM

COMMAND7 (Display control setup command)

• First byte

Contents

Notes

0 to 7

State

Function

—

Command 7 identification code.

—

Display control setup.

—

Extended command 0 identification code

—

SEL1

Vertical synchronizing signal (external V separation) input

Switches the SEPIN (pin 20) input.

Frame signal input

Only valid when CTL3 is high.

CTL3

Use internal V separation

Switches V separation

Do not use internal V separation

• Second byte

Contents

Notes

0 to 7

State

Function

—

Second byte identification bit

—

VNPSEL

V falling edge detection

Switches the V acquisition polarity in external mode

V rising edge detection

when internal V separation is used.

VSPSEL

VSEP: about 8.9 µs (for NTSC)

Switches the internal V separation period

VSEP: about 17.8 µs (for NTSC)

MSKERS

Mask valid

Clears the HSYNC and VSYNC masks

Mask invalid

MSKSEL

3H (for NTSC)

Switches the VSYNC mask

20H (for NTSC)

EGL

Frame level 0 only (VBK0)

Switches the frame level

Two-stage frame level (VBK0 and VBK1)

(Only valid when BLK0 is 0 and BLK1 is 1.)

Note: All registers are set to 0 when the LC74786/M/JM is reset by the RST pin.

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