MAX15053_11 datasheet(18/21 Pages) MAXIM

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High-Efficiency, 2A, Current-Mode

Synchronous, Step-Down Switching Regulator

18 _____________________________________________________________________________________

(

)

(

)

LOAD S

CO OUT

LOAD

1 D

0.5

L f

R1 R2

2 f

ESR

1 D

0.5

L f









−

















× π

























−

































and where the ESR is much smaller than the parallel

combination of the equivalent load resistance and the

current loop impedance, e.g.,:

(

)

LOAD

ESR

1 D

0.5

L f









−

















RC becomes:

OUT

2 f

R1 R2

3) Determine CC by selecting the desired first sys-

tem zero, fZ1, based on the desired phase margin.

Typically, setting fZ1 below 1/5 of fCO provides suf-

ficient phase margin.

C C

C R

≤

π ×

therefore:

≥

π ×

4) For low duty-cycle applications, the addition of a

phase-leading capacitor (CFF in Figure 1) helps

mitigate the phase lag of the damped half-frequency

double pole. Adding a second zero near to but below

the desired crossover frequency increases both the

closed-loop phase margin and the regulator’s unity-

gain bandwidth (crossover frequency). Select the

capacitor as follows:

(

)

R1|| R2

π ×

This guarantees the additional phase-leading zero

occurs at a frequency lower than fCO from:

PHASE_LEAD

π ×

Using CFF the zero-pole order is adjusted as follows:

2 C R1 2 C (R1|| R2)

≤

≈

≤

Confirm the desired operation of CFF empirically. The

phase lead of CFF diminishes as the output voltage is

a smaller multiple of the reference voltage, e.g., below

about 1V. Do not use CFF when VOUT = VFB.

Setting the Soft-Start Time

The soft-start feature ramps up the output voltage slowly,

reducing input inrush current during startup. Size the

CSS capacitor to achieve the desired soft-start time, tSS,

using:

ISS, the soft-start current, is 10FA (typ) and VFB, the

output feedback voltage threshold, is 0.6V (typ). When

using large COUT capacitance values, the high-side

current limit can trigger during the soft-start period. To

ensure the correct soft-start time, tSS, choose CSS large

enough to satisfy:

OUT

HSCL

OUT

) V

−

IHSCL is the typical high-side MOSFET current-limit

value.

An external tracking reference with steady-state value

between 0V and VIN - 1.8V can be applied to SS/REFIN.

In this case, connect an RC network from external track-

ing reference and SS/REFIN, as shown in Figure 4. The

recommended value for RSS is approximately 1kI.

RSS is needed to ensure that, during hiccup period,

SS/REFIN can be internally pulled down.

When an external reference is connected to SS/REFIN,

the soft-start must be provided externally.

Figure 4. RC Network for External Reference at SS/REFIN

CSS

RSS

VREF_EXT

SS/REFIN

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