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IMX28CEC Scheda tecnica(PDF) 30 Page - Freescale Semiconductor, Inc |
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IMX28CEC Scheda tecnica(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 70 page ![]() i.MX28 Applications Processors Data Sheet for Consumer Products, Rev. 1 30 Freescale Semiconductor 3.5.2.2 Ethernet PLL Electrical Specifications i.MX28 provides a 50-MHz/25-MHz output clock, called the Ethernet PLL output. Table 34 lists the Ethernet PLL output electrical specifications. Table 34. Ethernet PLL Specifications Parameter Test Conditions Min Typ Max Unit Output Duty Cycle — 45 50 55 % PLL lock time — — — 10 µs Cycle to cycle jitter — — 25 — ps Clock output frequency tolerance1 1 This Ethernet output clock tolerance specification is the contribution from the PLL only and assumes a perfect 24 MHz clock/crystal source with 0 ppm deviation. The 24 MHz crystal frequency tolerance/deviation should be added to this number for the total Ethernet clock output frequency tolerance. —— — +/-20 ppm |
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