L6727 datasheet(16/34 Pages) STMICROELECTRONICS

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Application details

L6727

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Doc ID 12933 Rev 4

Compensation goal is to close the control loop assuring high DC regulation accuracy, good

dynamic performances and stability. To achieve this, the overall loop needs high DC gain,

high bandwidth and good phase margin.

High DC gain is achieved giving an integrator shape to compensation network transfer

function. Loop bandwidth (F0dB) can be fixed choosing the right RF/RFB ratio, however, for

stability, it should not exceed FSW/2π. To achieve a good phase margin, the control loop gain

has to cross 0dB axis with -20 dB/decade slope.

As an example, Figure 7 shows an asymptotic bode plot of a type III compensation.

Figure 7.

Example of type III compensation.

●

Open loop converter singularities:

●

Compensation Network singularities frequencies:

Gain

[dB]

Log (Freq)

0dB

open loop

EA gain

closed

loop gain

compensation

gain

open loop

converter gain

ESR

Z1 FZ2

20log (R

F/RFB)

20log (V

IN/ΔVOSC)

0dB

π LC

OUT

⋅

----------------------------------

ESR

π C

OUT

ESR

⋅⋅

--------------------------------------------

π R

⋅⋅

------------------------------

π R

() C

⋅⋅

-----------------------------------------------------

π R

⋅

---------------------

⎝⎠

⎛⎞

⋅⋅

--------------------------------------------------

π R

⋅⋅

-------------------------------

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