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CPWR-AN08 Scheda tecnica(PDF) 5 Page - Cree, Inc |
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CPWR-AN08 Scheda tecnica(HTML) 5 Page - Cree, Inc |
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5 / 6 page ![]() 5 Application Considerations for SiC MOSFETs January 2011 CPWR-AN08, REV - Application Considerations for SiC MOSFETs - January 2011 This document is provided for informational purposes only and is not a warranty or a specification. For product specifications, please see the data sheets available at www.cree.com/power. For warranty information, please contact Cree Sales at PowerSales@cree.com. Figure The inductive turn-off losses versus temperature of the IGBTs are shown in Figure 6. The freewheeling diode Schottky diode. The turn-off losses of the IGBTs are significantl strongly increase with temperature. This is due to the tail loss inherent with IGBTs. The NPT IGBT is significantly better than the TFS IGBT. However, the NPT IGBT conduction losses are much higher than the CMF20102D. The TFS IGBT conduction loss is lower than the the highest of the three. Turn-off Loss Figure 6: Switching loss vs. temperature comparison (V To achieve fast switching time, the gate drive interconnections need to have minimum parasitics, especially inductance. This requires the gate driver to be located as close as possible to the CMF20120D. Care should be exercised to minimize or eliminate r be achieved by selecting an appropriate external gate resistor. certain amount of turn-off snubbing that reduces voltage overshoot and ringing. As with any majority carrier device, the CMF20120D has no tail, so the amount of drain voltage overshoot and parasitic ringing is noticeably higher. The higher ringing is of concern because the lower transconductance and low threshold voltage of the CMF20120D di/dt can couple back to the gate circuit through any common gate/source inductance. connection for the gate drive is recommended, especially if the gate driver cannot be located clos CMF20120D. Ferrite beads (nickel- are helpful to minimize ringing while maintaining fast switching time high value resistor (10kΩ) between gate and source in order to prevent excessive floating of the gate during system power up propagation delays. Like any other power MOSFET, the that has a 2.5 – 2.7 V built-in voltage, but a to a Si SJMOSFET. Use of this diode is not recommended due to its high forward drop. An exte Schottky diode is suggested. Cree’s C2D10120A is the recommended device until such time that a 247 single co-packaged part is released. Conclusions: 6 5: Qg*RDS(on) Figure of Merit Comparison off losses versus temperature of the CMF20120D compared with the TFS and NPT The freewheeling diode used with all devices was a 1.2 kV, 10A SiC off losses of the IGBTs are significantly higher than the CMF20120D strongly increase with temperature. This is due to the tail loss inherent with IGBTs. The NPT IGBT is significantly better than the TFS IGBT. However, the NPT IGBT conduction losses are much higher than The TFS IGBT conduction loss is lower than the NPT IGBT, but the switching loss is Turn-on Loss : Switching loss vs. temperature comparison (VDD = VCC = 800V, ID = IC = 20A, To achieve fast switching time, the gate drive interconnections need to have minimum parasitics, especially inductance. This requires the gate driver to be located as close as possible to the . Care should be exercised to minimize or eliminate ringing in the gate drive circuit. This can be achieved by selecting an appropriate external gate resistor. The silicon IGBT current off snubbing that reduces voltage overshoot and ringing. As with any majority has no tail, so the amount of drain voltage overshoot and parasitic ringing is noticeably higher. The higher ringing is of concern because the lower transconductance and of the CMF20120D reduces gate noise immunity. The high level of drain current di/dt can couple back to the gate circuit through any common gate/source inductance. A Kelvin recommended, especially if the gate driver cannot be located clos -zinc recommended) in lieu of or in addition to an external gate resistor are helpful to minimize ringing while maintaining fast switching time. It is also recommended to connect a en gate and source in order to prevent excessive floating of the gate gation delays. power MOSFET, the CMF20102D has a body diode. The body diode is a SiC PN in voltage, but a substantially lower reverse recovery charge when compared to a Si SJMOSFET. Use of this diode is not recommended due to its high forward drop. An exte Cree’s C2D10120A is the recommended device until such time that a ed part is released. compared with the TFS and NPT used with all devices was a 1.2 kV, 10A SiC CMF20120D and strongly increase with temperature. This is due to the tail loss inherent with IGBTs. The NPT IGBT is significantly better than the TFS IGBT. However, the NPT IGBT conduction losses are much higher than , but the switching loss is = 20A, RG = 10 ) To achieve fast switching time, the gate drive interconnections need to have minimum parasitics, especially inductance. This requires the gate driver to be located as close as possible to the inging in the gate drive circuit. This can current tail provides a off snubbing that reduces voltage overshoot and ringing. As with any majority has no tail, so the amount of drain voltage overshoot and parasitic ringing is noticeably higher. The higher ringing is of concern because the lower transconductance and reduces gate noise immunity. The high level of drain current A Kelvin recommended, especially if the gate driver cannot be located close to the zinc recommended) in lieu of or in addition to an external gate resistor It is also recommended to connect a en gate and source in order to prevent excessive floating of the gate is a SiC PN diode substantially lower reverse recovery charge when compared to a Si SJMOSFET. Use of this diode is not recommended due to its high forward drop. An external SiC Cree’s C2D10120A is the recommended device until such time that a TO- |
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